Intel 80960HD - Manual (Page 78)

80960HA/HD/HT
78 Datasheet
Figure 54. A Summary of Aligned and Unaligned Transfers for 32-Bit Regions
0 4 8 12 16 20 24
0 1 2 3 4 5 6
One Double-Word
Short-Word
Load/Store
Word
Load/Store
Double-Word
Load/Store
Short Requests (Unaligned)
Short Request (Aligned)
Short Request (Aligned)
Byte, Byte Requests
Word Request (Aligned)
Trey, Byte, Requests
Short, Short Requests
Byte, Trey, Requests
Byte Offset
Word Offset
One Double-Word Burst (Aligned)
Trey, Byte, Trey, Byte, Requests
Short, Short, Short, Short Requests
Byte, Trey, Byte, Trey, Requests
Word, Word Requests
Request (Aligned)
NOTES:
1. All requests that are less than a word in size and are cacheable will be promoted to a word to be cached. This causes
adjacent requests to occur for full words to the same address.