National Instruments VXI-MIO Series User Manual

Page 146

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Index

VXI-MIO Series User Manual

I -6

National Instruments Corporation

L

LabVIEW and LabWindows/CVI

software, 1-3

M

manual.

See

documentation.

memory.

See

SIMM size configuration.

multichannel scanning, 3-8 to 3-9

N

NI-DAQ driver software, 1-3 to 1-4
noise, avoiding, 4-45
NRSE (nonreferenced single-ended input)

description (table), 3-3
differential connections, 4-16 to 4-17
recommended configuration

(figure), 4-13

single-ended connections (NRSE

configuration), 4-19 to 4-20

O

onboard EEPROM.

See

EEPROM.

operation of VXI-MIO series boards.

See

hardware overview.

output characteristics

VXI-MIO-64E-1, A-5
VXI-MIO-64XE-10, A-13

P

parts locator diagrams, 2-3, 2-4
PFI0/TRIG1 signal

description (table), 4-4
VXI-MIO-64E-1 (table), 4-6
VXI-MIO-64XE-10 (table), 4-8

PFI1/TRIG2 signal

description (table), 4-4
VXI-MIO-64E-1 (table), 4-6
VXI-MIO-64XE-10 (table), 4-8

PFI2/CONVERT* signal

description (table), 4-4
VXI-MIO-64E-1 (table), 4-6
VXI-MIO-64XE-10 (table), 4-8

PFI3/GPCTR1_SOURCE signal

description (table), 4-4
VXI-MIO-64E-1 (table), 4-6
VXI-MIO-64XE-10 (table), 4-8

PFI4/GPCTR1_GATE signal

description (table), 4-4
VXI-MIO-64E-1 (table), 4-6
VXI-MIO-64XE-10 (table), 4-9

PFI5/UPDATE* signal

description (table), 4-5
VXI-MIO-64E-1 (table), 4-7
VXI-MIO-64XE-10 (table), 4-9

PFI6/WFTRIG signal

description (table), 4-5
VXI-MIO-64E-1 (table), 4-7
VXI-MIO-64XE-10 (table), 4-9

PFI7/STARTSCAN signal

description (table), 4-5
VXI-MIO-64E-1 (table), 4-7
VXI-MIO-64XE-10 (table), 4-9

PFI8/GPCTR0_SOURCE signal

description (table), 4-5
VXI-MIO-64E-1 (table), 4-7
VXI-MIO-64XE-10 (table), 4-9

PFI9/GPCTR0_GATE signal

description (table), 4-5
VXI-MIO-64E-1 (table), 4-7
VXI-MIO-64XE-10 (table), 4-9

PFIs (programmable function inputs),

4-24 to 4-25

common questions about, C-5 to C-6
overview, 4-23
signal routing, 3-16
timing input connections, 4-24 to 4-25

illustration, 4-24

PGIA (programmable gain instrumentation

amplifier)

analog input connections, 4-10 to 4-11

illustration, 4-10

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