National Instruments VXI-MIO Series - Manual (Page 41)

Chapter 3 Hardware Overview
VXI-MIO Series User Manual 3-12  National Instruments Corporation
Note: The PFI0/TRIG1 pin is a high-impedance input. Therefore, it is
susceptible to cross-talk from adjacent pins, which can result in false
triggering when the pin is left unconnected. To avoid false triggering, make
sure this pin is connected to a low-impedance signal source (less than
10 k
Ω
source impedance) if you plan to enable this input via software.
Figure 3-3. Analog Trigger Block Diagram
There are five analog triggering modes available, as shown in
Figures 3-4 through 3-8. You can set lowValue and highValue
independently in software.
In below-low-level analog triggering mode, the trigger is generated
when the signal value is less than lowValue . HighValue is unused.
Figure 3-4. Below-Low-Level Analog Triggering Mode
In above-high-level analog triggering mode, the trigger is generated
when the signal value is greater than highValue . LowValue is unused.
Analog
Input
Channels
PFI0/TRIG1
PGIA
+
-
ADC
DAQ-STC
Analog
Trigger
Circuit
Mux
lowValue
Trigger