Figure 2-18, Configuration register write timing diagram -46 – National Instruments SCXI-1121 User Manual
Page 61
Chapter 2
Configuration and Installation
© National Instruments Corporation
2-45
3.
Pull SLOT0SEL* low to deassert the SS* line and establish conditions
for writing a new slot-select number to the Slot 0 Slot-Select Register.
4.
If you are not selecting another slot, you should write zero to the Slot
0 Slot-Select Register.
Figure 2-18 illustrates a write to the SCXI-1121 Configuration Register of
the binary pattern:
10000011 00001111
Figure 2-18. Configuration Register Write Timing Diagram
To read from the Module ID Register, follow these steps:
1.
Initial conditions:
SS* asserted low
SERDATIN = don't care
DAQD*/A = 1. Make sure DAQD*/A does not go low or erroneous
data will be written to the Configuration Register.
SLOT0SEL* = 1
SERCLK = 1 (and has not changed since SS* went low)
2.
For each bit to be read:
SERCLK = 0
SERCLK = 1. Clock the data.
Read the level of the SERDATOUT line.
3.
Pull SLOT0SEL* low to deassert the SS* line and establish conditions
for writing a new slot- select number to the Slot 0 Slot-Select Register.
4.
If you are not selecting another slot, you should write zero to the Slot 0
Slot-Select Register.
SLOT0SEL*
SERDATIN
SERCLK
SS*
0
1
0
0 0 0
1
1 0
0 0 0 1
1 1 1