24 receive maximum length register (rxmaxlen), 25 receive buffer offset register (rxbufferoffset), Section 5.24 – Texas Instruments TMS320C674X User Manual

Page 107: Section 5.25

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EMAC Module Registers

5.24 Receive Maximum Length Register (RXMAXLEN)

The receive maximum length register (RXMAXLEN) is shown in

Figure 62

and described in

Table 61

.

Figure 62. Receive Maximum Length Register (RXMAXLEN)

31

16

Reserved

R-0

15

0

RXMAXLEN

R/W-5EEh

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 61. Receive Maximum Length Register (RXMAXLEN) Field Descriptions

Bit

Field

Value

Description

31-16

Reserved

0

Reserved

15-0

RXMAXLEN

0-FFFFh

Receive maximum frame length. These bits determine the maximum length of a received frame.
The reset value is 5EEh (1518). Frames with byte counts greater than RXMAXLEN are long
frames. Long frames with no errors are oversized frames. Long frames with CRC, code, or
alignment error are jabber frames.

5.25 Receive Buffer Offset Register (RXBUFFEROFFSET)

The receive buffer offset register (RXBUFFEROFFSET) is shown in

Figure 63

and described in

Table 62

.

Figure 63. Receive Buffer Offset Register (RXBUFFEROFFSET)

31

16

Reserved

R-0

15

0

RXBUFFEROFFSET

R/W-0

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 62. Receive Buffer Offset Register (RXBUFFEROFFSET) Field Descriptions

Bit

Field

Value

Description

31-16

Reserved

0

Reserved

15-0

RXBUFFEROFFSET

0-FFFFh

Receive buffer offset value. These bits are written by the EMAC into each frame SOP
buffer descriptor Buffer Offset field. The frame data begins after the RXBUFFEROFFSET
value of bytes. A value of 0 indicates that there are no unused bytes at the beginning of
the data, and that valid data begins on the first byte of the buffer. A value of Fh (15)
indicates that the first 15 bytes of the buffer are to be ignored by the EMAC and that valid
buffer data starts on byte 16 of the buffer. This value is used for all channels.

107

SPRUFL5B – April 2011

EMAC/MDIO Module

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