Toshiba TECRA S1 - Manual (Page 21)

1.2 System Unit Block Diagram 1 Hardware Overview
TECRA S1 Maintenance Manual 1-7
The system unit of the computer consists of the following components:
Processor: Mobile Banias
• Mobile Banias
− Core speed: 1.3, 1.4, 1.5, 1.6 GHz
− System bus: 400 MHz
− Core operating at 1.484 V
− Integrated level 1 cache: 64 KB
(32KB instruction cache and 32KB data cache)
− On-die level 2 cache 1 MB
− MMX and Katmai New Instruction (KNI) supported
Memory
Two BTO/CTO-capable expansion memory slots are provided, coming standard with
one 256MB module. They can hold 128/256/512MB expansion memory modules
available as options to grow up to 1 GB.
• PC2100 DDR SDRAM supported
• 128/256/512MB modules supported
− 128 MB (8M x 16 x 8P)
− 256 MB (16M x 16 x 8P)
− 512 MB (16M x 16 x 16P)
− 512 MB (32M x 16 x 8P)
• 2.5 volt operation
• No parity bit
• 64-bit data transfer