Clearing the enable registers, The status byte group’s enable register – VXI VT1422A User Manual

Page 149

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Programming the VT1422A for Data Acquisition and Control 147

Chapter 4

Bit 3 (QUE)
bit value 8

10

Read the Questionable Data Group’s Event Register
using the STAT:QUES:EVENT? query. This will
return bit values for events which have occurred in this
group. After reading, the Event Register is cleared.

Note that bits in this group indicate error conditions.
If bit 8, 9, or 10 is set, error messages will be found in
the Error Queue. If bit 7 is set, error messages will be in
the error queue following the next *RST or cycling of
power. Use the SYST:ERR? query to read the error(s).

Bit 4 (MAV)
bit value 16

10

There is a message available in the Output Queue.
The appropriate query should be executed.

Bit 5 (ESB)
bit value 32

10

Read the Standard Event Group’s Event Register using
the *ESR? query. This will return bit values for events
which have occurred in this group. After reading, this
status register is cleared.

Note that bits 2 through 5 in this group indicate error
conditions. If any of these bits are set, error messages
will be found in the Error Queue. Use the SYST:ERR?
query to read these.

Bit 7 (OPR)
bit value 128

10

Read the Operation Status Group’s Event Register
using the STAT:OPER:EVENT? query. This will
return bit values for events which have occurred in this
group. After reading, the Event Register is cleared.

Clearing the Enable

Registers

To clear the Enable Registers execute:

STAT:PRESET

for Operation Status and
Questionable Data Groups

*ESE 0

for the Standard Event Group

*SRE 0

for the Status Byte Group

The Status Byte

Group’s Enable

Register

The Enable Register for the Status Byte Group has a special purpose.
Notice in Figure 4-10 how the Status Byte Summary bit wraps back around
to the Status Byte. The summary bit sets the RQS (request service) bit in the
Status Byte. Using this Summary bit (and those from the other status groups)
the Status Byte can polled and the RQS bit checked to determine if there are
any status conditions which need attention. In this way, the RQS bit is like
the GPIB’s SRQ (Service Request) line. The difference is that while executing
a GPIB serial poll (SPOLL) releases the SRQ line, executing the *STB?
query does not clear the RQS bit in the Status Byte. The Event Register of
the group whose summary bit is causing the RQS must be read.

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