VXI VT1422A - Manual (Page 197)

Creating and Running Algorithms 195 Chapter 6
St
a
te
F
re
que
ncy
To
ta
liz
e
Di
g
ita
l
I/
O
SC
Ps
An
al
og
Inpu
t
SC
P
An
al
og
Inpu
t
SC
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Vo
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R
e
sist
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Te
m
p
.
St
ra
in
An
al
og
Inpu
t
SC
P
An
alog Ou
tp
u
t
SCP
Vo
lta
g
e
Cu
rr
e
n
t
Di
g
ita
l
I/
O
SC
Ps
St
a
te
Pu
ls
e
s
PW
M
FM
PHASE
1
IN
PUT
PHASE
4
OUTPUT
PHASE 4
CALCU
LA
TE
PHASE 3
CALCULA
T
E
PH
AS
E 2 UPDA
T
E
A/D
EU
C
onv
ers
ion
Inp
u
t
C
h
a
nne
l
Bu
ffe
r
(I10
0-I1
63)
G
lo
b
a
l V
a
riabl
es
Lo
c
a
l V
a
ri
ab
le
s
m
a
in
() fu
nction
(driver g
e
nera
ted
)
Ou
tp
u
t
C
h
a
nne
l
Bu
ffe
r
(0
10
0-016
3
)
FIFO B
u
ffe
r
64
C
h
ann
el
Sc
an List
Al
g
o
rit
h
m
C
ode
AL
G
1
U
p
d
a
te
Q
ueu
e
For V
a
riab
les and
Alg
o
rith
ms
U
p
d
a
te
Q
ueu
e
For V
a
riab
les and
Alg
o
rith
ms
Cur
ren
t V
a
lu
e
T
a
b
le
(e
le
me
nt
s
10
- 51
1
)
FIFO
(64k
V
a
lue
s
)
T
rigger
TRI
G
:T
IM
E
R
T
rigger
INPUT
UPDATE
CALCULATE
64 Channel analog Multiplexer
OUTPUT
ALG:OUTP
:DELA
Y
VXIbus
8
16
88 88 88 8 8
16
Figure 6-2. Algorithm Operating Sequence Diagram