1 slave boot, 2 performing a slave boot – Cirrus Logic CS485xx User Manual

Page 21

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2-3

Copyright 2009 Cirrus Logic, Inc.

DS734UM7

Slave Boot Procedures

CS485xxr Hardware User’s Manual

Pseudocode and flowcharts will be used to describe each of these boot procedures in detail. The flow charts
use the following messages:

Write_* –

Write to

CS485xx

Read_* – Read from

CS485xx

Please note that * above can be replaced by SPI

or I

2

C

®

depending on the mode of host communication.

For each case, the general download algorithm is the same. The system designer should also refer to the
control port sections of this document in

Chapter 3, "Serial Control Port"

for the details of when writing to

and reading from the

CS485xx

is valid.

After completing the full download to the

CS485xx

, a KICK START message is sent to cause the application

code to begin execution. Please note that it takes time to lock the PLL when initially booting the DSP.
Typically this time is less than 200 ms. If a message is sent to the DSP during this time, the SCP_BSY pin
will go low to indicate that the DSP is busy. Any messages sent when the SCP_BSY pin is LOW will be lost.
If the SCP_BSY pin stays LOW longer than 200 ms, the host must reboot the DSP.

2.3.1 Slave Boot

The Slave Boot procedure is a sequence in which the external host is the bus master and directly loads the

CS485xx

application code. The system host controller has two communication modes available, as specified

in

Table 2-1

. from the serial control port (SPI or I

2

C). The boot messages used can be found in

Section 2.3.3

"Boot Messages" on page 2-6

. For information on how to configure the

CS485xx

overlays, such as hardware

configuration messages, software configuration messages, and the kick-start message, please refer to
AN298,

CS485xx

Firmware User’s Manual”.

2.3.2 Performing a Slave Boot

Figure 2-2

shows the steps taken during a Slave Boot. The procedure is discussed in

Section 2.3.2.1

.

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