Cirrus Logic CS485xx - Manual (Page 54)

3-22 Copyright 2009 Cirrus Logic, Inc. DS734UM7
SPI Port
CS485xx Hardware User’s Manual
3.3.1.4.2 SCP_IRQ Behavior
The SCP_IRQ signal is not part of the SPI protocol, but is provided so that the slave can signal that it has
data to be read. A high-to-low transition on SCP_IRQ indicates to the master that the slave has data to be
read. When a master detects a high-to-low transition on SCP_IRQ, it should send a Start condition and
begin reading data from the slave.
SCP_IRQ is guaranteed to remain low (once it has gone low), until the rising edge of SCP_CLK for the last
bit of the last byte to be transferred out of CS485xx. If there is no more data to be transferred, SCP_IRQ will
go high at this point. After going high, SCP_IRQ is guaranteed to stay high until the rising edge of SCP_CS.
This end-of-transfer condition signals the master to end the read transaction by clocking the last data bit out
of CS485xx and then driving the CS485xx SCP_CS line high to signal that the read sequence is over. If
SCP_IRQ is still low after the rising edge of SCP_CLK on the last data bit of the current byte, the master
should continue reading data from the serial control port. It should be noted that all data should be read out
of the serial control port during one cycle or a loss of data will occur. In other words, all data should be read
out of the chip until SCP_IRQ signals the last byte by going high as described above.
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