Cirrus Logic CS485xx User Manual
Page 98
Pin Assignments
CS485xx Hardware User’s Manual
DS734UM7
Copyright 2009 Cirrus Logic, Inc.
9-18
Table 9-10
shows the names and functions for each pin of the CS48540.
36
GPIO11
General Purpose Input/Output
1. SCP_CLK
1. SPI/I
2
C Control Port Clock
3.3V (5V tol)
BiDi/OD
IN
Y
37
VDDIO3
I/O power supply voltage
3.3V
PWR
38
GPIO8
General Purpose Input/Output
1. SCP_CS
1. SPI Chip Select
3.3V (5V tol)
BiDi
IN
Y
39
GPIO12
General Purpose Input/Output
1. SCP_IRQ
1. Serial Control Port Data Ready Interrupt
Request
3.3V (5V tol)
BiDi/OD
IN
Y
40
GNDIO4
I/O ground
0V
PWR
41
GPIO13
General Purpose Input/Output
1. SCP_BSY
2. EE_CS
1. Serial Control Port Input Busy
2. EEPROM Boot Chip Select.
3.3V (5V tol)
BiDI/OD
IN
Y
42
VDDD3
Core power supply voltage
1.8V
PWR
43
XTAL_OUT
Buffered Reference Clock
Input/Crystal Oscillator Input
3.3V (5V tol)
BiDi
44
XTI
Reference Clock Input/Crystal
Oscillator Input
3.3V (5V tol)
ANA
45
XTO
Crystal Oscillator Output
3.3V
ANA
46
GNDA
PLL ground
3.3V
PWR
47
PLL_REF_RES
Current Reference Output for
PLL. Connect to resistor.
3.3V
ANA
48
VDDA
PLL power.
3.3V
PWR
Table 9-10. Pin Assignments of CS48540
LQFP-48
Pin #
Function 1
(Default)
Description of Default
Function
Secondary Functions
Description of Secondary Functions
Pwr
Type
Reset
State
Pullup
at
Reset
1
TEST
Test
3.3V (5V tol)
IN
2
RESET
Active Low Chip Reset
3.3V (5V tol)
IN
3
DBDA
Debug Data
3.3V (5V tol)
BiDi
IN
Y
4
GNDD1
Core ground
0V
PWR
5
DBCK
Debug Clock
3.3V (5V tol)
BiDi
IN
Y
6
DAI1_LRCLK
PCM Audio Input Sample
Rate (Left/Right) Clock
3.3V (5V tol)
IN
Y
7
GNDIO1
I/O ground
0V
PWR
8
DAI1_SCLK
PCM Audio Input Bit Clock
3.3V (5V tol)
IN
Y
9
GNDD2
Core ground
0V
PWR
10
GPIO16
General Purpose Input/Output
1. DAI1_DATA0
1. Digital Audio Input Data
3.3V (5V tol)
BiDi
IN
Y
11
GPIO0
General Purpose Input/Output
1. DAI1_DATA1
1. Digital Audio Input Data
3.3V (5V tol)
BiDi
IN
Y
12
VDDIO1
I/O power supply voltage
3.3V
PWR
13
GPIO1
General Purpose Input/Output
1. DAI1_DATA2
1. Digital Audio Input Data
3.3V (5V tol)
BiDi
IN
Y
14
GPIO2
General Purpose Input/Output
3.3V (5V tol)
BiDi
IN
Y
15
GPIO17
General Purpose Input/Output
1. DAI2_DATA0
1. Digital Audio Input Data
3.3V (5V tol)
BiDi
IN
Y
16
VDDD1
Core power supply voltage
1.8V
PWR
17
GPIO14
General Purpose Input/Output
1. DAI2_LRCLK
1. PCM Audio Input Sample Rate (Left/
Right) Clock
3.3V (5V tol)
BiDi/OD
IN
Y
18
GPIO15
General Purpose Input/Output
1. DAI2_SCLK
PCM Audio Input Bit Clock
3.3V (5V tol)
BiDi
IN
Y
19
GNDIO2
I/O ground
0V
PWR
20
DAO1_DATA0
Digital Audio Output 0
1. HS0
1. Hardware Strap Mode Select.
3.3V (5V tol)
BiDi
IN
21
DAO_LRCLK
PCM Audio Sample Rate
Clock
3.3V (5V tol)
BiDi
IN
Y
22
GNDD3
Core ground
0V
PWR
23
DAO_SCLK
PCM Audio Output Bit Clock
3.3V (5V tol)
BiDi
IN
Y
24
VDDIO2
I/O power supply voltage
3.3V
PWR
Table 9-9. Pin Assignments of CS48560 (Continued)
LQFP-48
Pin #
Function 1
(Default)
Description of Default
Function
Secondary Functions
Description of Secondary Functions
Pwr
Type
Reset
State
Pullup
at
Reset