Cirrus Logic CS485xx - Manual (Page 75)

6-9 Copyright 2009 Cirrus Logic, Inc. DS734UM7
Digital Audio Output Port Description
CS485xx Hardware User’s Manual
Table 6-6 shows values and messages for the DAO_LRCLK polarity configuration parameter.
Table 6-7 shows values and messages for the DAO_SCLK polarity configuration parameter.
Table 6-8 shows values and messages for the DAO TDM Modes for the CS48560 DSPs.
6.2.5 S/PDIF Transmitter
The S/PDIF transmitter provided on the XMTA pin can output an IEC60958-compliant S/PDIF stream. The
modulation clock source for the S/PDIF transmitter is the clock present on the DAO_MCLK pin. The sample
rate of the transmitter will be the same setting as for the DAO port.
The DAO_DATA3/ XMTA S/PDIF output pin on the CS48560 can be configured as:
• I
2
S output - Default
• S/PDIF Transmitter - Sent configuration from Table 6-10
Table 6-6. Output DAO_LRCLK Polarity Configuration (Parameter E)
E Value DAO_LRCLK Polarity Hex Message
0 (default) LRCLK=Low indicates Left Subchannel
0x8140001C
0x00000700
0x8140001D
0x00000700
1 LRCLK=Low indicates Right Subchannel
0x8180001C
0xFFFFFBFF
0x8140001C
0x00000300
0x8180001D
0xFFFFFBFF
0x8180001D
0x00000300
Table 6-7. Output DAO_SCLK Polarity Configuration (Parameter F)
F Value DAO_SCLK Polarity Hex Message
0 (default)
Data Valid on Rising Edge (clocked out on
falling)
0x8180001C
0xFFFFEFFF
0x8180001D
0xFFFFEFFF
1
Data Valid on Falling Edge (clocked out on
rising)
0x8140001C
0x00001000
0x8140001D
0x00001000
Table 6-8. DAO TDM (Parameter G)
G Value DAO1_D0 DAO1_D1 DAO1_D2 DAO1_D3 Hex Message
0 (default) 2 ch 2 ch 2 ch 2 ch
0x8140001C
0x00000700
1 4 ch 0 ch 2 ch 2 ch
0x8140001C
0x00000600
0x8180001C
0xFFFFFEFF
2 6 ch 0 ch 0 ch 2 ch
0x8140001C
0x00000400
0x8180001C
0xFFFFFCFF