Cirrus Logic CS4953xx - Manual (Page 108)

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45 74 SD_D11 SDRAM Data Bit 11 EXT_D11 Flash Data Bit 11
3.3V
(5V tol)
BiDir IN Y
46 75 SD_D10 SDRAM Data Bit 10 EXT_D10 Flash Data Bit 10
3.3V
(5V tol)
BiDir IN Y
47 76 GNDIO3 I/O ground 0V PWR
48 77 SD_D9 SDRAM Data Bit 9 EXT_D9 Flash Data Bit 9
3.3V
(5V tol)
BiDir IN Y
49 78 SD_D8 SDRAM Data Bit 8 EXT_D8 Flash Data Bit 8
3.3V
(5V tol)
BiDir IN Y
50 79 SD_DQM1 SDRAM Data Mask 1
3.3V
(5V tol)
OUT
51 80 SD_CLKOUT SDRAM Clock Output
3.3V
(5V tol)
OUT
52 81 SD_CLKIN SDRAM Clock Input
3.3V
(5V tol)
In Y
53 82 SD_CLKEN SDRAM Clock Enable
3.3V
(5V tol)
OUT
54 83 VDD3
Core power supply
voltage
1.8V PWR
55 84 SD_A12
SDRAM Address Bit
12
EXT_A12 Flash Address Bit 12
3.3V
(5V tol)
OUT
56 85 SD_A11
SDRAM Address Bit
11
EXT_A11 Flash Address Bit 11
3.3V
(5V tol)
OUT
57 86 GNDD3 Core ground 0V PWR
58 87 SD_A9 SDRAM Address Bit 9 EXT_A9 Flash Address Bit 9
3.3V
(5V tol)
OUT
59 88 SD_A8 SDRAM Address Bit 8 EXT_A8 Flash Address Bit 8
3.3V
(5V tol)
OUT
60 89 VDDIO4
I/O power supply
voltage
3.3V PWR
61 90 SD_A7 SDRAM Address Bit 7 EXT_A7 Flash Address Bit 7
3.3V
(5V tol)
OUT
Table 9-10. Pin Assignments (Continued)
LQFP-
144
Pin #
LQFP-
128
Pin #
Function 1
(Default)
Description of Default
Function
Secondary Functions Description of Secondary
Functions
Pwr Type
Reset
State
Pullup
at
Reset