Cirrus Logic CS4953xx - Manual (Page 61)

5-5 Copyright 2010 Cirrus Logic, Inc. DS732UM10
DAI Hardware Configuration
CS4953xx Hardware User’s Manual
5.1.4.2 Left-Justified Format
Figure 5-3 illustrates the left-justified format with a rising-edge DAIn_SCLK. Data is presented most-
significant bit first on the first DAIn_SCLK after a DAIn_LRCLK transition and is valid on the rising edge of
DAIn_SCLK. For the left-justified format, the left subframe is presented when DAIn_LRCLK is high and
the right subframe is presented when DAIn_LRCLK is low. The left-justified format can also be
programmed for data to be valid on the falling edge of DAIn_SCLK.
Figure 5-3. Left-justified Format (Rising Edge Valid SCLK)
5.2 DAI Hardware Configuration
After code download or soft reset, and before kickstarting the application, the host has the option of
changing the default hardware configuration. (Please see AN288, “CS4953xx/CS497xxx Firmware User’s
Manual” for more information on kickstarting). In general, the hardware configuration can only be changed
immediately after download or after soft reset.
Hardware configuration messages are used to physically reconfigure the hardware of the audio decoder,
as when enabling or disabling address checking for the serial communication port. Hardware
configuration messages are also used to initialize the format (for example, I
2
S, left justified, and others)
for digital data inputs, as well as the data format and clocking options for the digital output port.
5.2.1 DAI Hardware Naming Convention
The naming convention of the input hardware configuration is as follows:
INPUT A B C D
Where A, B, C, and D are the parameters used to fully define the input port. The parameters are defined
as follows:
• A - Data Format
• B - SCLK Polarity
• C - LRCLK Polarity.
• D - DAI Mode
DAIn_LRCLK
DAIn_SCLK
L e ft C h a n n e l R i g ht C h a n n el
DAIn_DATA +3 +2 +1 LSB +5 +4 MSB -1 -2 -3 -4 -5 +3 +2 +1 +5 +4 -1 -2 -3 -4 LSB MSB