Cirrus Logic CS4953xx - Manual (Page 79)

8-1 Copyright 2010 Cirrus Logic, Inc. DS732UM10
SDRAM Controller
CS4953xx Hardware User’s Manual
Chapter 8
External Memory Interfaces
8.1 SDRAM Controller
The CS4953xx supports a glueless external SDRAM interface to extend the data and/or program memory
of the DSP during runtime. The CS4953xx SDRAM controller provides two-port access to X, Y, and P
memory space, a four-word read buffer, and a double-buffered four-word write buffer. One SDRAM
controller port is dedicated to P memory space and the second port is shared by X and Y memories. An
arbiter is wrapped around the first port to provide external SDRAM access through both X and Y memory
space from 8000H-FFFFH. The second port is connected to provide external SDRAM access through P
memory space from 8000H-FFFFH.
The X/Y port has dual write buffers and a single read buffer. The P memory port has a single read buffer.
One of these buffers contains four 32-bit words (128 bits). Every miss to the read buffer will cause the
SDRAM controller to burst eight 16-bit reads on the SDRAM interface.
Figure 8-1 shows a block diagram
of the SDRAM external memory control interface for the CS4953xx chip.
Figure 8-1. SDRAM Interface Block Diagram
BA[1:0]
SD_DATA[15:0]
SD_CLKIN
SD_CLKOUT
SD_CAS
SD_DQM0
SD_DQM1
SD_RAS
SD_CLKEN
SD_CS
SD_WE
SDRAM I
N
TE
RFAC
E
X RAM
X ROM
Y RAM
Y ROM
P RAM
P ROM
MEMOR
Y
C
O
NTROL
L
E
R
X
Y
P
AR
B
IT
E
R
SD_ADDR[12:0]