Cirrus Logic CS4953xx User Manual
Page 110
D
S
73
2U
M
1
0
C
op
yri
ght 201
0
C
irr
us Log
ic
,
In
c
9
-2
2
Pin A
s
s
ign
me
nts
C
S
495
3xx
H
a
rd
w
a
re
U
s
e
r’s
M
a
n
ual
79
108
SD_CAS
SDRAM Column
Address Strobe
3.3V
(5V tol)
OUT
80
109
SD_RAS
SDRAM Row Address
Strobe
3.3V
(5V tol)
OUT
81
110
SD_CS
SDRAM Chip Select
3.3V
(5V tol)
OUT
82
111
EXT_A15
Flash Address Bit 15
3.3V
(5V tol)
OUT
83
112
VDD5
Core power supply
voltage
1.8V
PWR
84
113
EXT_A16
Flash Address Bit 16
3.3V
(5V tol)
OUT
85
114
EXT_A17
Flash Address Bit 17
3.3V
(5V tol)
OUT
86
115
GNDD5
Core ground
0V
PWR
87
116
EXT_A18
Flash Address Bit 18
3.3V
(5V tol)
OUT
88
117
EXT_A19
Flash Address Bit 19
3.3V
(5V tol)
OUT
89
118
EXT_OE
Flash Output Enable
3.3V
(5V tol)
OUT
90
119
EXT_CS1
Active-low Flash chip
select
3.3V
(5V tol)
OUT
91
120
VDDIO6
I/O power supply
voltage
3.3V
PWR
92
-
GPIO30
General Purpose
Input/Output
1. CSW_U
2. XMTB_IN
1. Channel status user data
input
2. S/PDIF Pass-thru Input
3.3V
(5V tol)
BiDir
IN
Y
93
121
RESET
Chip Reset
3.3V
(5V tol)
In
94
122
GNDIO6
I/O ground
0V
PWR
Table 9-10. Pin Assignments (Continued)
LQFP-
144
Pin #
LQFP-
128
Pin #
Function 1
(Default)
Description of Default
Function
Secondary Functions
Description of Secondary
Functions
Pwr
Type
Reset
State
Pullup
at
Reset