Cirrus Logic CS5376A - Manual (Page 47)

CS5376A
DS612F4 47
13.FIR FILTER
The finite impulse response (FIR) filter block con-
sists of two cascaded stages, FIR1 and FIR2. It
compensates for SINC filter droop and creates a
low-pass corner to block aliased components of the
input signal.
On-chip linear phase or minimum phase coeffi-
cients can be selected using a configuration com-
mand, or the coefficients can be programmed for a
custom filter response.
13.1 FIR1 Filter
The FIR1 filter stage has a decimate by four archi-
tecture. It compensates for SINC filter droop and
flattens the magnitude response of the pass band.
The on-chip linear and minimum phase coefficient
sets are 48-tap, with a maximum 255 programma-
ble coefficients. All coefficients are normalized to
24-bit two’s complement full scale, 0x7FFFFF.
The characteristic equation for FIR1 is a convolu-
tion of the input values, X(n), and the filter coeffi-
cients, h(k), to produce an output value, Y.
Y = [h(k)*X(n-k)] + [h(k+1)*X(n-(k+1))] + ...
13.2 FIR2 Filter
The FIR2 filter stage has a decimate by two archi-
tecture. It creates a low-pass brick wall filter to
block aliased components of the input signal.
The on-chip linear and minimum phase coefficient
sets are 126-tap, with a maximum 255 programma-
ble coefficients. All coefficients are normalized to
24-bit two’s complement full scale, 0x7FFFFF.
The characteristic equation for FIR2 is a convolu-
tion of the input values, X(n), and the filter coeffi-
cients, h(k), to produce an output value, Y.
Y = [h(k)*X(n-k)] + [h(k+1)*X(n-(k+1))] + ...
13.3 On-Chip FIR Coefficients
Two sets of on-chip linear phase and minimum
phase coefficients are available for FIR1 and FIR2.
Performance of the on-chip coefficient sets is very
good, with excellent ripple and stop band charac-
teristics as described in Figure 26 and Table 12.
Which on-chip coefficient set to use is selected by
a data word following the ‘Write ROM Coeffi-
cients’ configuration command. See “Filter Coeffi-
cient Selection” on page 41 for information about
selecting on-chip coefficient sets.
FIR1 Filter - decimate by 4 FIR2 Filter - decimate by 2
Figure 25. FIR Filter Block Diagram