Cirrus Logic CS5376A - Manual (Page 85)

CS5376A
DS612F4 85
23.1.4 SPI1DAT2 : 0x09, 0x0A, 0x0B
(MSB) 23 22 21 20 19 18 17 16
S1DAT23 S1DAT22 S1DAT21 S1DAT20 S1DAT19 S1DAT18 S1DAT17 S1DAT16
R/W R/W R/W R/W R/W R/W R/W R/W
0 0 0 0 0 0 0 0
15 14 13 12 11 10 9 8
S1DAT15 S1DAT14 S1DAT13 S1DAT12 S1DAT11 S1DAT10 S1DAT9 S1DAT8
R/W R/W R/W R/W R/W R/W R/W R/W
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 (LSB) 0
S1DAT7 S1DAT6 S1DAT5 S1DAT4 S1DAT3 S1DAT2 S1DAT1 S1DAT0
R/W R/W R/W R/W R/W R/W R/W R/W
0 0 0 0 0 0 0 0
SPI 1 Address: 0x09
0x0A
0x0B
-- Not defined;
read as 0
R Readable
W Writable
R/W Readable and
Writable
Bits in bottom rows
are reset condition
Figure 44. SPI 1 Data Register SPI1DAT2
Bit definitions:
23:16 S1DAT[23:16] SPI 1 Data
High Byte
15:8 S1DAT[15:8] SPI 1 Data
Middle Byte
15:8 S1DAT[7:0] SPI 1 Data
Low Byte