Figure 50. spi 2 data register spi2dat, Cs5376a, Bit definitions – Cirrus Logic CS5376A User Manual

Page 92

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background image

CS5376A

92

DS612F4

23.2.6

SPI2DAT : 0x12

(MSB) 23

22

21

20

19

18

17

16

SDAT23

SDAT22

SDAT21

SDAT20

SDAT19

SDAT18

SDAT17

SDAT16

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

0

0

0

0

0

0

0

0

15

14

13

12

11

10

9

8

SDAT15

SDAT14

SDAT13

SDAT12

SDAT11

SDAT10

SDAT9

SDAT8

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

0

0

0

0

0

0

0

0

7

6

5

4

3

2

1

(LSB) 0

SDAT7

SDAT6

SDAT5

SDAT4

SDAT3

SDAT2

SDAT1

SDAT0

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

0

0

0

0

0

0

0

0

DF Address: 0x12

--

Not defined;
read as 0

R

Readable

W

Writable

R/W

Readable and
Writable

Bits in bottom rows
are reset condition

Figure 50. SPI 2 Data Register SPI2DAT

Bit definitions:

23:16 SDAT[23:16]

SPI2 Upper Data
Byte

15:8

SDAT[15:8]

SPI2 Middle Data
Byte

15:8

SDAT[7:0]

SPI2 Lower Data
Byte

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