Cirrus Logic CS5376A - Manual (Page 83)

CS5376A
DS612F4 83
23.1.2 SPI1CMD : 0x03, 0x04, 0x05
(MSB) 23 22 21 20 19 18 17 16
S1CMD23 S1CMD22 S1CMD21 S1CMD20 S1CMD19 S1CMD18 S1CMD17 S1CMD16
R/W R/W R/W R/W R/W R/W R/W R/W
0 0 0 0 0 0 0 0
15 14 13 12 11 10 9 8
S1CMD15 S1CMD14 S1CMD13 S1CMD12 S1CMD11 S1CMD10 S1CMD9 S1CMD8
R/W R/W R/W R/W R/W R/W R/W R/W
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 (LSB) 0
S1CMD7 S1CMD6 S1CMD5 S1CMD4 S1CMD3 S1CMD2 S1CMD1 S1CMD0
R/W R/W R/W R/W R/W R/W R/W R/W
0 0 0 0 0 0 0 0
SPI 1 Address: 0x03
0x04
0x05
-- Not defined;
read as 0
R Readable
W Writable
R/W Readable and
Writable
Bits in bottom rows
are reset condition
Figure 42. SPI 1 Command Register SPI1CMD
Bit definitions:
23:16 S1CMD[23:16] SPI 1 Command
High Byte
15:8 S1CMD[15:8] SPI 1 Command
Middle Byte
15:8 S1CMD[7:0] SPI 1 Command
Low Byte