Cirrus Logic CS5376A - Manual (Page 63)

CS5376A
DS612F4 63
data is read from the SD port data FIFO, SDRDY is
released and SDTKO is pulsed high for 100 nS.
16.3.2 Continuous Mode
To have the CS5376A automatically initiate SD
port transactions whenever data becomes available,
connect SDTKI to a 4 MHz or slower clock source
such as MCLK/2. The first rising edge into SDTKI
after data becomes available in the SD port FIFO
causes the CS5376A to initiate an SD port transac-
tion by driving SDRDY low. If data is not available
in the SD port FIFO, the SDTKI signal is passed
through to the SDTKO output.
Once an SD port transaction is initiated, serial
clocks into SDCLK cause data to be output to
SDDAT, as shown in Figure 33. When all available
data is read from the SD port data FIFO, SDRDY is
released and SDTKO is pulsed high for 100 nS.
SDRDY
SDCLK
SDDAT
Figure 33. SD Port Transaction
MSB LSB
SDTKI
SDTKO