Gain and offset correction, 1 gain correction, 2 offset correction – Cirrus Logic CS5376A User Manual
Page 59: Gain correction 15.2. offset correction, Figure 30. gain and offset correction, Cs5376a

CS5376A
DS612F4
59
15.GAIN AND OFFSET CORRECTION
The CS5376A digital filter can apply independent
gain and offset corrections to the data of each mea-
surement channel. Also, an offset calibration algo-
rithm can automatically calculate offset correction
values for each channel.
Gain correction values are written to the GAINx
registers (0x21-0x24), while offset correction val-
ues are written to the OFFSETx registers (0x25-
0x28). Gain and offset corrections are enabled by
the USEGR and USEOR bits in the FILTCFG reg-
ister (0x20).
When enabled, the offset calibration algorithm will
automatically calculate offset correction values for
each channel and write them into the OFFSETx
registers. Offset calibration is enabled by writing
the EXP and ORCAL bits in FILTCFG.
15.1 Gain Correction
Gain correction in the CS5376A normalizes sensor
gains in multi-sensor networks. It requires exter-
nally calculated correction values to be written into
the GAINx registers (0x21-0x24).
Gain correction values are 24-bit two’s comple-
ment with unity gain defined as full scale,
0x7FFFFF. Gain correction always scales to a frac-
tional value, and can never gain the digital filter
data greater than one.
Output Value = Data * (GAIN / 0x7FFFFF)
Unity Gain: GAIN = 0x7FFFFF
50% Gain: GAIN = 0x3FFFFF
Zero Gain: GAIN = 0x000000
Once the GAIN registers are written, the USEGR
bit in the FILTCFG register enables gain correc-
tion.
15.2 Offset Correction
Offset correction in the CS5376A cancels the DC
bias of a measurement channel by subtracting the
Figure 30. Gain and Offset Correction
FIR
IIR
Filters
Filter
Output to High Speed Serial Data Port (SD Port)
Offset
Correction
Output Rate 4000 SPS ~ 1 SPS
SINC
Filter
MDI Input
512 kHz
Correction
Gain
Offset
Calibration
4
4
4
4