Cirrus Logic CS8420 - Manual (Page 76)

76 DS245F4
CS8420
13.7.1 Pin Description - Hardware Mode 6
Overall Device Control:
DFC0, DFC1 - Data Flow Control Inputs
DFC0 and DFC1 inputs determine the major data flow options available in Hardware mode, according to Table 5 .
S/AES - Serial Audio or AES3 Input Select
S/AES is connected to VD+ in Hardware mode 6, in order to select the serial audio input.
SFMT0, SFMT1 - Serial Audio Input Port Data Format Select Inputs
SFMT0 and SFMT1 select the serial audio input port format. See Table 15 .
OMCK - Output Section Master Clock Input
Output section master clock input. The frequency must be 256x the output sample rate (Fso).
Audio Input Interface:
SDIN - Serial Audio Input Port
Data Input Audio data serial input pin.
ISCLK - Serial Audio Input Port Bit Clock
Input or Output Serial bit clock for audio data on the SDIN pin.
* Pins which remain the same function in all modes.
COPY/C
DFC0
EMPH
SFMT0
SFMT1
VA+
AGND
FILT
RST
APMS
TCBLD
ILRCK
ISCLK
SDIN
28
27
26
25
*24
*23
*22
21
20
19
18
17
16
15
1
2
3
4
5
6*
7*
8*
9*
10
11
12
13
14 ORIG
DFC1
TXP
TXN
H/S
VD+
DGND
OMCK
S/AES
AUDIO
U
V
CEN
TCBL