ADLINK PCM-9112+ - Manual (Page 33)

Registers • 25
3
Registers
The descriptions of the registers and structure of the PCI-9112 are outlined in
this chapter. The information in this chapter will assist programmers, who
wish to handle the card with low-level programs.
In addition, the low level programming syntax is introduced. This information
can help the beginners to operate the PCI-9112 in the shortest learning time.
3.1 I/O Registers Map
The PCI-9112 functions as a 32-bit PCI target device to any master on the
PCI bus. It supports burst transfer to memory space by using 32-bit data. All
data read and write is base on 32-bit data. There are three types of registers
on the PCI-9112: PCI Configuration Registers (PCR), Local Configuration
Registers (LCR) and the 9112 registers.
The PCR is compliant to the PCI-bus specifications. It is initialized and
controlled by the plug & play (PnP) PCI BIOS. User can study the PCI BIOS
specification to understand the operation of the PCR. Please contact PCISIG
to acquire the specifications of the PCI interface.
The PCI bus controller AMCC-5933 specifies the LCR, which is provided by
AMCC Corp (www.amcc.com). It is not necessary for users to understand
the details of the LCR if you use the software library.
The Table 3.1 shows the 9112 I/O address of each register with respect to
the base address. The function of each register is also shown.