ADLINK PCI-7442 - Manual (Page 40)

28 Operation theory
3.2 Change of State (COS) interrupt
Overview
The COS (Change of State) means either the input state (logic
level) changes from low to high, or from high to low. The COS
detection circuit will detect the edge of level change. In the PCI-
7442/7443 card, the COS detection circuit is applied to all the
input channels. When any channel changes its logic level, the
COS detection circuit generates an interrupt request to PCI con-
troller.
COS detection
Figure 3-2 is an example of an 8-CH COS operation. All of the
enabled DI channels’ signal level change will be detected to gen-
erate the interrupt request.
While the interrupt request generates, the corresponding DI data
will also be latched into the COS latch register. In our COS archi-
tecture, the DI data are sampled by a 33 MHz clock. It means the
pulse width of the digital input have to last longer than 31 ns, or the
COS latch register won’t latch the correct input data. The COS
latch register will be erased after clearing the interrupt request.
Figure 3-2: COS Timing