ADLINK PCI-7442 - Manual (Page 75)

Register Format 63
WDT INT Control / Hot-Reset Hold Control Register
The PCI-7444 has the watchdog timer as interrupt mode. The
WDT interrupt mode is disabled by default. In this mode, you can
enable the WDT to count down. The interrupt asserts when the
WDT Counter reaches to zero. You can enable the WDT and clear
the WDT INT by setting two Bit (WDTE and WIC) in the WDT INT
Control/Hot-Reset Hold Control Register.
The PCI-7444 provides some special safety functions for industrial
applications. When the WDT interrupt asserts, you can set the
system to send out the Safety DO value to prevent untoward dam-
age using the WSOE bit. In addition, when the system performs an
unexpected or abnormal hot system reset, you can set the PCI-
7444 to retain its original DO values before system hot reset. Oth-
erwise the PCI-7444 enters the power-up initial procedure to send
out the default initial DO values you configured. By setting the
HRHE bit you can enable the Hot_Reset_Hold function anytime.
This function is applicable for unstable operating environments.
Address: BASE+0x3Ah
Reset Value: 0x0000h
Read/Write: W
-- -- -- -- WSOE WIC WDTE HRHE
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
-- -- -- -- -- -- -- --
Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 Bit8
Bit15 - 4 Not used
Bit3 WSOE: WDT Safety DO send out enable
1: Function is enabled
0: Function is disabled (default)
Bit2 WIC: WDT interrupt clear
1: Clear WDT interrupt
0: No effect
Bit1 WDTE: WDT interrupt enable control
1: WDT is enabled
0: WDT is disabled (default)
Bit0 HRHE: Enable hot system reset DO hold
function