ADLINK PCI-7442 User Manual

Page 68

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56

Register Format

When the I/O direction setting is input , users can read data
through the TTL I/O input channel.

Address

R/W

Value Mapping (MSB----LSB)

BASE+0x0Eh

R

TTL_IO_DI[15...]

BASE+0x4Eh

R

TTL_IO_DI[31...16]

Bit value:

0: Input in low logic.

1: Input in high logic. (Default)

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