ADLINK PCI-7442 - Manual (Page 55)

Register Format 43
Watchdog Timer Load, Safety DO Setup/Read Back
Registers
The PCI-7442 provides a 32-bit watch dog timer (WDT) with 10
MHz clock. The WDT counter loads the 32-bit value of two 16-bit
WDT_LOAD_CONFIG Registers in turn. The corresponding hexa-
decimal value you set determines the overflow time of WDT coun-
ter. The overflow time is calculated by the value that you set
multiplied 100 ns. The timer interval is from 0 to 429.496 seconds.
When the WDT interrupt asserts, you can set the system to send
out Safety DO value by setting the SafetyOut_Enable bit. When
WDT INT asserts, the system process may halt or be offline. This
function thus prevents untoward damage. You can configure the
default 64-CH safety DO values which are stored in the flash
memory. When WDT interrupt asserts and the SafetyOut_Enable
bit is enabled, the PCI-7442 enters the safety DO procedure which
sends out the default safety value to 64-CH digital outputs.
You can program the 64-CH safety default DO values by access-
ing the last WDTSafety DO Setup register in turn. After accessing
the last WDTSafety DO Setup register (BASE+0x9Eh), it takes
500 ms to finish writing the procedure to the flash memory. You
can check if the procedure is finished or not by nAction_Ready
flag.
Address R/W Value Mapping (MSB----LSB)
BASE+0x94h W WDT_LOAD_CONFIG[15…0]
BASE+0x96h W WDT_LOAD_CONFIG[31...16]
Address R/W Value Mapping (MSB----LSB)
BASE+0x98h W IDO[15…0]
BASE+0x9Ah W IDO[31...16]
BASE+0x9Ch W IDO[47...32]
BASE+0x9Eh W IDO[63...56]
Bit value: 0: Output Power MOSFET is OFF. (Initial value)
1: Output Power MOSFET is ON.