Artesyn ATCA-8310 Installation and Use (May 2014) - Manual (Page 260)

CPLD and FPGA
ATCA-8310 Installation and Use (6806800M72E) 260
8.1.5.3.4 Configuration CRC Error
During normal operation the operation the Configuration is periodically checked by dedicated
FPGA internal logic. In the case of a CRC error the signal CONF_CRC_ERR is asserted to signal
the system, that FPGA logic may be corrupted.
Such an error is handled like a power failure.
8.1.5.4 CPLD Serial Redirection
Figure 8-2 CPLD Serial Redirection
 IPMC_TXD
IPMC_RXD 
IPMC_COM2FP 
CPLD
IMPC 
Debug 
FPGA 
COM1 
3 PinHeader
Face Plate
COM1 
FPGA_COM1_TXD 
FPGA_COM1_RXD 
IPMC_RXD_CON
FP_COM1_TXD
FP_COM1_RXD

IPMC_COM2FP =0
or SWITCH[4]on:
IPMC_COM2FP =1
or SWITCH[1]on: