Artesyn ATCA-8310 Installation and Use (May 2014) - Manual (Page 343)

CPLD and FPGA
ATCA-8310 Installation and Use (6806800M72E) 343
2 GPP_PROCHOT_ GPP Processor Hot enable:
0: Disabled
1:Enabled 0 SPP: r/w
3 GPP_CATERR_ GPP Catastrophic Error enable:
0: Disabled
1:Enabled 0 SPP: r/w
4 SRIO_INT_ Interrupt from SRIO Switch enable:
0: Disabled
1:Enabled 0 SPP: r/w
5 SPP_DIMM0_THE
RM_EVENT_ SPP DIMM thermal event 0 enable:
0: Disabled
1:Enabled 0 SPP: r/w
6 SPP_DIMM1_THE
RM_EVENT_ SPP DIMM thermal event 1 enable:
0: Disabled
1:Enabled 0 SPP: r/w
7 SPP_USB2_OC_ USB Over Current event enable:
0: Disabled
1:Enabled 0 SPP: r/w
8 SPP_RTC_IRQ_ RTC Interrupt forward to SPP enable:
0: Disabled
1:Enabled 0 SPP: r/w
15:9 - Reserved 0 r
Table 8-152 SPP Miscellaneous Interrupt Enable Register (continued)
Address: 0xAA - 0xAB
Bit Interrupt Signal Description Default Access