Epson ARM.POWERED ARM720T - Manual (Page 125)

8: Coprocessor Interface
ARM720T CORE CPU MANUAL EPSON 8-5
8.4 Coprocessor interface handshaking
The ARM720T core and any coprocessors in the system perform a handshake using the signals
shown in Table 8-2.
These signals are explained in more detail in Coprocessor signaling on page 8-6.
8.4.1 The coprocessor
The coprocessor decodes the instruction currently in the Decode stage of its pipeline and
checks whether that instruction is a coprocessor instruction. A coprocessor instruction has a
coprocessor number that matches the coprocessor ID of the coprocessor.
If the instruction currently in the Decode stage is a coprocessor instruction:
1 The coprocessor attempts to execute the instruction.
2 The coprocessor signals back to the ARM720T core using EXTCPA and EXTCPB.
8.4.2 The ARM720T core
Coprocessor instructions progress down the ARM720T processor pipeline in step with the
coprocessor pipeline. A coprocessor instruction is executed if the following are true:
1 The coprocessor instruction has reached the Execute stage of the pipeline. (It might
not if it was preceded by a branch.)
2 The instruction has passed its conditional execution tests.
3 A coprocessor in the system has signalled on EXTCPA and EXTCPB that it is able
to accept the instruction.
If all these requirements are met, the ARM720T processor signals by taking CPnCPI LOW.
This commits the coprocessor to the execution of the coprocessor instruction.
Table 8-2 Handshaking signals
Signal Direction Meaning
CPnCPI ARM720T core to coprocessor Not coprocessor instruction
EXTCPA Coprocessor to ARM720T core Coprocessor absent
EXTCPB Coprocessor to ARM720T core Coprocessor busy