Epson ARM.POWERED ARM720T - Manual (Page 57)

2: Programmer’s Model
ARM720T CORE CPU MANUAL EPSON 2-17
2.11 Implementation-defined behavior of instructions
The ARM Architecture Reference Manual defines the instruction set of the ARM720T
processor:
• See Indexed addressing on a Data Abort for the behavior of instructions that are
identified as implementation-defined in the ARM Architecture Reference Manual .
• See Early termination for those features that define signed and unsigned early
termination on the ARM720T processor.
2.11.1 Indexed addressing on a Data Abort
In the event of a Data Abort with pre-indexed or post-indexed addressing, the value left in Rn
is defined to be the updated base register value for the following instructions:
• LDC
• LDM
• LDR
• LDRB
• LDRBT
• LDRH
• LDRSB
• LDRSH
• LDRT
• STC
• STM
• STR
• STRB
• STRBT
• STRH
• STRT.
2.11.2 Early termination
On the ARM720T, early termination is defined as:
MLA, MUL Signed early termination.
SMULL, SMLAL Signed early termination.
UMULL, UMLAL Unsigned early termination.