Motorola MVME1X7P - Manual (Page 144)

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VMEchip2
2
TBLSC These bits control the snoop signal lines on the local bus
when the DMAC is table walking. The snooping functions
differ according to processor type, as shown:
ROM0 This bit is not used on the MVME1x7P. Its function is
performed by the ROM0 bit in the Petra/MC2 PROM
Access Time Control register. Refer to Chapter 3.
WAIT RMW This function is not used on the MVME1x7P.
Local-Bus-to-VMEbus Requester Control Register
This register controls the VMEbus request level, the request mode, and
release mode for the local-bus-to-VMEbus interface.
LVREQL These bits define the VMEbus request level. The request
level can only change while the VMEchip2 is bus master.
The VMEchip2 always requests at the old level until it
becomes bus master and the new level takes effect. If the
VMEchip2 is bus master when the level is changed, the
new level does not take effect until the bus has been
released and re-requested at the old level. The requester
always requests the VMEbus at level 3 the first time
following a SYSRESET.
TBLSC Requested Snoop Operation
19 18 MC68040 MC68060
0 0 Snoop disabled Snoop enabled
0 1 Source dirty, sink byte/word/longword Snoop disabled
1 0 Source dirty, invalidate line Snoop enabled
1 1 Snoop disabled (Reserved) Snoop disabled
ADR/SIZ $FFF40030 (8 bits [7 used] OF 32)
BIT 15 14 13 12 11 10 9 8
NAME ROBN DHB DWB LVFAIR LVRWD LVREQL
OPER R/W R R/W R/W R/W R/W
RESET 0 PS 0 PS 0 PSL 0 PS 0 PS 0 PS