Motorola MVME1X7P - Manual (Page 204)

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PCCchip2
3
53C710 SCSI Controller Interface
The PCCchip2 provides a map decoder and an interrupt handler for the
NCR-53C710 SCSI I/O Processor. The base address for the 53C710 is
$FFF47000.
When the PCCchip2 detects low a level on the IRQ* line from the 53C710,
if such interrupts are enabled, it generates an interrupt to the MPU.
If the C040 bit is set, the interrupt request goes to the MPU via the EIPL*
pins at the level that is programmed for SCSI interrupts in the SCSI
Interrupt Control Register.
If the C040 bit is cleared, the interrupt goes to the MPU via the INT pin (if
the level that is programmed for SCSI interrupts in the SCSI Interrupt
Control Register is higher than the level set in the Interrupt Mask Level
Register).
Parallel Port Interface
The PCCchip2 provides an 8/16-bit bidirectional parallel port. All eight or
sixteen bits of the port must be either inputs or outputs (no individual
selection). In addition to the 8/16 bits of data, there are two control pins
and five status pins. Each of the status pins can generate an interrupt to the
MPU in any of the following programmable conditions: high level, low
level, high-to-low transition, or low-to-high transition. This port may be
used as a parallel printer port or as a general parallel I/O port.
When used as a parallel printer port, the five status pins function as: Printer
Acknowledge (ACK), Printer Fault (FAULT*), Printer Busy (BSY),
Printer Select (SELECT), and Printer Paper Error (PE); while the control
pins act as Printer Strobe (STROBE*), and Input Prime (INP*).
The PCCchip2 provides an auto-strobe feature similar to that of the
MVME147 PCC. In auto-strobe mode, after a write to the Printer Data
Register, the PCCchip2 automatically asserts the STROBE* pin for a
selected time specified by the Printer Fast Strobe control bit. In manual
mode, the Printer Strobe control bit directly controls the state of the
STROBE* pin.