Motorola MVME1X7P - Manual (Page 94)

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VMEchip2
2
Functional Blocks
The following sections provide an overview of the functions implemented
by the VMEchip2 ASIC. See
Figure 2-1 for a block diagram of the
VMEchip2. Detailed programming models for the local control and status
registers (LCSRs) and the global control and status registers (GCSRs)
appear in subsequent sections.
Local-Bus-to-VMEbus Interface
The local-bus-to-VMEbus interface allows local bus masters access to
global resources on the VMEbus. This interface includes a local bus slave,
a write post buffer, and a VMEbus master.
Using programmable map decoders with programmable attribute bits, the
local-bus-to-VMEbus interface can be configured to provide the following
VMEbus capabilities:
Addressing capabilities: A16, A24, A32
Data transfer capabilities: D08, D16, D32
The local bus slave includes six local bus map decoders for accessing the
VMEbus. The first four map decoders are general purpose programmable
decoders, while the other two are fixed and are dedicated for I/O decoding.
The first four map decoders compare local bus address lines A31 through
A16 with a 16-bit start address and a 16-bit end address. When an address
in the selected range is detected, a VMEbus select is generated to the
VMEbus master. Each map decoder also has eight attribute bits and an
enable bit. The attribute bits are for VMEbus AM (address modifier)
codes, D16 enable, and write post (WP) enable.
The fourth map decoder also includes a 16-bit alternate address register
and a 16-bit alternate address select register. This allows any or all of the
upper 16 address bits from the local bus to be replaced by bits from the
alternate address register. The feature allows the local bus master to access
any VMEbus address.