Vmechip2, Bus error processing, Error conditions – Motorola MVME1X7P User Manual

Page 81: Vmechip2 -55 bus error processing -55, Error conditions -55

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Error Conditions

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1

A hardware error occurs on the VMEbus.

A VMEbus slave reports an access error (such as parity error).

VMEchip2

An 8- or 16-bit write to the LCSR in the VMEchip2 ASIC causes a local
BERR

.

Bus Error Processing

Because different conditions can cause bus error exceptions, the software
must be able to distinguish the source. To aid in this, status registers are
provided for every Local Bus master. The next section describes the
various causes of bus error and the associated status registers.

Generally, the bus error handler can interrogate the status bits and proceed
with the result. However, an interrupt may occur during the execution of
the bus error handler (before an instruction can write to the status register
to raise the interrupt mask). If the interrupt service routine causes a second
bus error, the status that indicates the source of the first bus error may be
lost. Application software must take this possibility into account.

Error Conditions

This section lists the various error conditions that are reported by the
single-board computer hardware. A subheading identifies each error
condition; a standard format provides the following information:

Description of the error

How notification of the error is made

Status register(s) containing information about the error

Comments pertaining to the error

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