Motorola MVME1X7P - Manual (Page 200)

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PCCchip2
3
Functional Description
The following sections provide an overview of the functions provided by
the PCCchip2. A detailed programming model for the PCCchip2 control
and status registers is provided in a later section.
General Description
The PCCchip2 interfaces the MC68040 microprocessor bus to the local
peripherals on the Single-Board Computers including: battery-backed
RAM, Serial Communications Controller (CL-CD2401), LAN controller
(82596CA), and SCSI controller (NCR53C710). The PCCchip2 also
provides two 32-bit timers and a parallel I/O port. The block diagram of
the PCCchip2 is shown as Figure 3-1.
Figure 3-1. PCCchip2 Block Diagram
BBRAM
PARALLEL
I/O PORT
CD2401
SCC
TICK
TIMER 1
TICK
TIMER 2
INTERRUPT
HANDLER
BBRAM
I/F
PRINTER
PORT
I/F
CD2401
SERIAL
I/F
MISC.
MAP
DECODER
bd065 9209
SCSI
MEMC040
LANC
MC68040
BUS
I/F
M
C
68
040
B
U
S