Motorola MVME1X7P - Manual (Page 220)

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PCCchip2
3
Tick Timer 2 Control Register
This is an 8-bit read/write register that controls Tick Timer 2. It is located
at address $FFF42016.
CEN Counter Enable. When this bit is high, the counter
increments. When this bit is low, the counter does not
increment.
COC Clear On Compare. When this bit is high, the counter is
reset to zero when it compares with the compare register.
When this bit is low, the counter is not reset.
COVF Clear Overflow Counter. The overflow counter is cleared
when a one is written to this bit.
OVF3-OVF0 These four bits are the outputs of the overflow counter.
The overflow counter is incremented each time the tick
timer sends an interrupt to the Local Bus interrupter. The
overflow counter can be cleared by writing a one to the
COVF control bit.
ADR/SIZ $FFF42016 (8 bits)
BIT 15 14 13 12 11 10 9 8
NAME OVF3 OVF2 OVF1 OVF0 COVF COC CEN
OPER R R R R R C R/W R/W
RESET 0 PL 0 PL 0 PL 0 PL 0 0 PL 0 PL 0 PL