10 port 80h post codes, Cpu failure behavior – Intel NetStructure MPCBL0001 User Manual

Page 44

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Technical Product Specification

Order #273817

Intel NetStructure

®

MPCBL0001 High Performance Single Board Computer

Contents

3.2.10

Port 80h POST Codes

When there is an FRB3 failure, the event message sent from the CPU Status sensor with sensor
type code 07 provides the last Port 80 code byte written by the BIOS. This information is contained
in Data Byte 3 of the event message.

Example:

To decode Port 80 data from SEL event when a board is booted without memory, refer to the
following method.

SEL EVENT - ID:0DD8(Tue Jan 25 18:45:20 2005) Gen:8E Type:07 No:50 Dir:6F D1:64 D2:6F
D3:E1

The values shown in bold above convey the following information:

The sensor type is 07. This refers to the processor.

Event data 1, bit 0-3 is 4. This refers to an FRB3/processor startup or initialization failure (the
CPU did not start).

Event data 3 is E1. This refers to the last Port 80h POST codes before the board hangs.

Refer to the tables in

Section 9.2

for descriptions of the Port 80h POST codes.

Note:

At any time when a board hangs, you may also use an OEM IPMI command to query the Port 80
POST codes. For the command syntax, refer to

Section 3.7.7, “Get Port80 Data” on page 52

.

Table 9.

CPU Failure Behavior

CPU Failure Detection

CPU Identification

Behavior

Operational Phase

CPU0

CPU1

Board Power Status

CMM SEL

Event

Health LED

POST

Normal

Normal

Bootable No

Green

Fail

Normal

Stop Booting

Yes

Red

Normal

Fail

Stop Booting

Yes

Red

Fail

Fail

Stop Booting

Yes

Red

Runtime

Normal

Normal

Keep Working

No

Green

Fail

Normal

Halt

Yes

Red

Normal

Fail

Halt

Yes

Red

Fail

Fail

Halt

Yes

Red

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