Parameters for btr and btw -11, Parameters for btr and btw – Rockwell Automation 1747-BSN Backup Scanner Module User Manual

Page 123

Advertising
background image

Publication 1747-UM010B-EN-P - September 2003

RIO Block Transfer 7-11

Parameters for BTR and BTW

The instructions have the following parameters:

Data File - The address in the SLC processor’s data file
containing the BTW or BTR data.

BTR/BTW Buffer File - Block transfer buffer file address;
i.e. M0: e.x00, where “e” is the slot number of the scanner and
“x” is the buffer number. The range of the buffer number is from
1 to 32. Each BTR and BTW instruction uses both the M1 and M0
files for a specific buffer number. M0 is used for BTR and BTW
control and for BTW data. M1 is used for BTR and BTW status
and BTR data.

Control - The control block is an integer data file address that
stores all the block transfer control and status information. The
control block is three words in length. Note that these integer
file addresses should not be used for any other instructions. You
should provide the following information for the control
structure.

Rack - The I/O rack number (0 to 3) of the I/O chassis in

which you placed the target I/O module.

Group - The I/O group number (0 to 7) which specifies the

position of the target I/O module in the I/O chassis. When
using 1/2-slot addressing, only even group numbers are valid.

Slot - The slot number (0 or 1) within the group. When using

2-slot addressing, the 0 slot is the low (right) slot and the 1
slot is the high (left) slot within the group. When using 1-slot
or 1/2-slot addressing, always select slot 0.

Requested Word Count - The number of words to transfer. If

you set the length to 0, the processor reserves 64 words for
block transfer data. The block transfer module transfers the
maximum words the adapter can handle. If you set the length
from 1 to 64, the processor transfers the number of words
specified.

TIP

The three-word control block has the following
structure. Before executing a block transfer, the BTR
and BTW instructions clear all status bits and
initialize word 2 to 0. See Table 7.1, “Control Block
Structure,” fo
r more information.

Advertising