Rockwell Automation 1746-HSCE2 Multi-Channel High Speed Counter Module - Manual (Page 52)

Publication 1746-UM002B-EN-P - August 2004
4-2 Configuration and Programming
Each block is made up of eight words. The first word is the control
word. The remaining seven words are data words. The control word
determines which parameters are in the data words. This
programming method applies to both classes of operation. The
programming blocks are described on pages 4-6 through 4-23.
Programming Cycle
Except for the Counter Control Block, all programming blocks are
written to the module with a programming cycle. Programming cycles
are controlled by the transmit and acknowledge bits.
A programming cycle consists of six steps.
1. Write the new data into the correct output image table words.
The lower byte of each configuration block indicates which
block is being transferred. See the programming block
descriptions on pages 4-6 to 4-28.
2. Each block that can be altered has a Transmit bit (O:e.0/15). Set
the Transmit bit in the output image table. The 1746-HSCE2 will
not act on the new programming block until the Transmit bit is
set.
3. Once the Transmit bit is set, an Acknowledge bit (I:e.0/15) is
received.
4. When the ladder logic detects that the Acknowledge bit is set, it
should check for errors. Error bits are only valid when the
Acknowledge bit is set. The error bits are the PERR bit (I:e.0/13)
and the MFLT bit (I:e.0/14).
5. If either bit is set, the programming block is rejected. The block
pointer is not incremented and initialization fails.
If neither error bit is set, the block pointer is incremented and
the Transmit bit is reset, allowing the module to transfer the next
block.
6. Once the desired configurable blocks have been transferred to
the module and the Maximum Block Address is recognized, the
Counter Control Block is transferred to the output image table to
enable the counters.