Achronix Speedster22i 10G/40G/100G Ethernet - Manual (Page 47)

UG029, September 6, 2013 47
Transmit Pause/PFC Operation
In transmit direction, for each of the 12 segments, an 8-bit input vector
(ff_tx_pfc_xoff<n>[7:0]) is provided to signal the creation of PFC control frames (XOFF bit).
When Link Pause Frame Mode is active, only the first input ff_tx_pfc_xoff<n>[0] for segment
n is used.
After the completion of a frame, the MAC samples these inputs and determines if, depending
on the current mode, a PFC or Link Pause control frame should be immediately scheduled.
The following cases can exist:
A pause is not in progress and the XOFF bit is set, so the current timer value is 0. In this case
a new Pause/PFC frame should be sent with the programmed quanta value.
A pause is already in progress for this priority, but the XOFF bit is now cleared, a new
Pause/PFC frame with QUANTA = 0 needs to be sent.
A pause is already in progress for that priority and the XOFF bit is still set, but the quanta
timer is between its max value and the threshold value, no new pause update is needed, so
send the next application frame.
A pause is already in progress for this priority and the XOFF bit is still set, but the timer
threshold has been reached. A refresh PFC/Pause control frame should be scheduled with the
programmed quanta timer value.
A pause is not in progress and the XOFF bit is cleared, no pause is needed, so send the next
application frame.
Receive Pause/PFC Operation
PFC Mode
When a PFC control frame is received with one or more Class Enable bits set, the
corresponding internal pause quanta counters are set with the quanta values extracted from
the PFC frame and start decrementing. For each of the 12 segments, an 8-bit status vector
(ff_rx_pfc_xoff<n>[7:0]) indicating the current pause status for the 8 priorities is provided to
the application layer. When asserted, it indicates that a PFC pause condition is in place (timer
not expired) for that priority and the upstream core logic should not schedule further traffic
for this class. When zero, this indicates the pause condition is no longer present and traffic
can be scheduled for this class.
When PFC mode is disabled, a received PFC frame is treated as a regular command frame
(see COMMAND_CONFIG(CMD_FRM_ENA)) and has no effect within the MAC.
Link Pause Mode
When a Link Pause frame is received, the quanta is extracted and loaded into an internal
timer to pause the transmitter. The transmitter continues to complete any ongoing frame
transmission and then enters a pause state where it does not read any user frames from the
transmit FIFO. When the transmitter has reached its pause state, the timer starts to
decrement. When the timer reaches 0, the transmitter resumes to normal transmission of
frames.
Only bit 0 of the segment’s status is used. The bit is asserted (1) and stays asserted as long as
the transmitter is in pause state (i.e. it will not necessarily assert at the time when the pause
frame was received). When the transmitter resumes to normal operation, the status signal
becomes 0 again.