Achronix Speedster22i 10G/40G/100G Ethernet - Manual (Page 58)

58 UG029, September 6, 2013
IEEE 1588 Timestamping
The 10 / 40 / 100 Gigabit Ethernet Channelized MAC Core supports IEEE 1588 Receive and
Transmit timestamping. The timestamping support can be mapped to any segment of FIFO
group 0 (10G: SEG0-3, 40G: SEG0, 100G: SEG0).
Receive Timestamping
When a frame is received, the MAC latches the value of the timer when the frame SFD field is
detected and provides the captured timestamp on ff_rx_ts[31:0]. This is done for all received
frames.
The DMA controller has to ensure that it transfers the timestamp provided for the frame into
the corresponding field within the receive descriptor for software access.
Transmit Timestamping
On transmit, only IEEE 1588 event frames need to be time-stamped. The client application
(e.g. the MAC driver) should detect 1588 event frames and set the signal ff_tx_ts_frm
together with the frame (must be valid during ff_tx_eop assertion).
For every transmitted frame where ff_tx_ts_frm is set to '1', the MAC returns the captured
timestamp on tx_ts[31:0] together with the frame sequence number (tx_ts_id[3:0]). Note that
it is the responsibility of the user application not to assert ff_tx_ts_frm for two consecutive
short frames, as correct synchronization of the captured timestamp into the FIFO clock
domain could not be guaranteed otherwise.
In addition, the MAC memorizes the timestamp for the frame in the register
TS_TIMESTAMP. The status bit STATUS( TS_AVAIL) is set to indicate that a new timestamp
is available.
Software would implement a handshaking procedure by setting the ff_tx_ts_frm signal when
it transmits the frame it needs a timestamp for, and then waits on the STATUS(TS_AVAIL)
status bit to know when the timestamp is available. It then can read the timestamp from the
TS_TIMESTAMP register. This is done for all 1588 event frames; other frames will not use the
ff_tx_ts_frm indicator and hence will not interfere with the timestamp capture.