Generating a netlist for eda tool use – Altera RAM Initializer User Manual

Page 20

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2–8

Confidential—Internal Use Only

Altera Corporation

RAM Initializer (ALTMEM_INIT) Megafunction User Guide

May 2008

Instantiating Megafunctions in HDL Code or Schematic Designs

Instantiating
Megafunctions
in HDL Code or
Schematic
Designs

When you use the MegaWizard Plug-In Manager to customize and
parameterize a megafunction, it creates a set of output files that allows
you to instantiate the customized function in your design. Depending on
the language you choose in the MegaWizard Plug-In Manager, the wizard
instantiates the megafunction with the correct parameter values and
generates a megafunction variation file (wrapper file) in Verilog HDL (.v),
VHDL (.vhd), or AHDL (.tdf), along with other supporting files.

The MegaWizard Plug-In Manager provides options to create the
following files:

A sample instantiation template for the language of the variation file
(_inst.v, _inst.vhd, or _inst.tdf)

Component Declaration File (.cmp) that can be used in VHDL
Design Files

ADHL Include File (.inc) that can be used in Text Design Files (.tdf)

Quartus II Block Symbol File (.bsf) that can be used in schematic
designs

Verilog HDL module declaration file that can be used when
instantiating the megafunction as a black box in a third-party
synthesis tool (_bb.v)

f

For more information about the wizard-generated files, refer to
Quartus II Help or to the

Recommended HDL Coding Styles

chapter in

volume 1 of the Quartus II Handbook.

Generating a Netlist for EDA Tool Use

If you use a third-party EDA synthesis tool, you can instantiate the
megafunction variation file as a black box for synthesis. Use the VHDL
component declaration or Verilog HDL module declaration black-box file
to define the function in your synthesis tool, and then include the
megafunction variation file in your Quartus II project.

If you enable the option to generate a synthesis area and timing
estimation netlist in the MegaWizard Plug-In Manager, the wizard
generates an additional netlist file (_syn.v). The netlist file is a
representation of the customized logic used in the Quartus II software.
The file provides the connectivity of the architectural elements in the
megafunction but may not represent true functionality. This information
enables certain third-party synthesis tools to better report area and timing
estimates. In addition, synthesis tools can use the timing information to
focus timing-driven optimizations and improve the quality of results.

f

For more information about using megafunctions in your third-party
synthesis tool, refer to the appropriate chapter in the

Synthesis

section in

volume 1 of the Quartus II Handbook.

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