Altera PowerPlay Early Power Estimator - Manual (Page 41)

Column Heading Description
Total Power This shows the estimated power (in watts) based on the
data rate and number of channels you entered. This value
is automatically calculated.
User Comments Enter any comments. This is an optional entry.
For more information about the high-speed differential I/O standards of the supported device families,
refer to the “High-Speed Differential I/O Interfaces” chapter of the respective device handbook.
XCVR Worksheet
The supported device families feature dedicated embedded circuitry transceiver channels. This section is
only applicable for designs targeting the supported device families.
The power calculated in this section applies to the transceiver blocks, including the channels used and all
circuitry used in the clock control unit (CCU). The I/O buffer power and PLL power for the transceivers
are included in this section. Transmitters and receivers assume 100 Ω termination.
Each row in the XCVR worksheet represents a separate transceiver domain. Enter the following
parameters for each transceiver domain:
• Number of channels
• Protocol used
• Selected V
CCA
and V
CCH_GXB
voltage (for Arria V GZ, Stratix IV GX, and Stratix V only)
• Selected V
CCL_GXB
, V
CCR
, and V
CCT
voltage
• Transceiver block operation mode
• Data rate (in Mbps)
• V
OD
setting (in mV)
• PLL sharing
• PLL type
• Pre-emphasis setting
• Adaptive dispersion control engine (ADCE) setting
• Decision feedback equalization (DFE) setting (for Arria V GZ and Stratix V only)
• Equalizer stages (for Arria V GZ and Stratix V only)
• Width of the parallel data bus
• For certain modes, you must specify if you use the byte serializer, rate match FIFO setting, and 8B/10B
encoder features.
UG-01070
2015.01.20
XCVR Worksheet 3-31
PowerPlay Early Power Estimator Worksheets Altera Corporation
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