Report_metastability, Report_metastability –132 – Altera SDC and TimeQuest API User Manual

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2–132

Chapter 2: SDC and TimeQuest API Package and Commands

sta

SDC and TimeQuest API Reference Manual

© December 2009

Altera Corporation

report_metastability

Usage

report_metastability [-append] [-file <name>] [-panel_name <name>] [-stdout]

Options

-append: If output is sent to a file, this option appends the result to that file.
Otherwise, the file will be overwritten

-file <name>: Sends the results to an ASCII or HTML file. Depending on the extension

-panel_name <name>: Sends the results to the panel and specifies the name of the new
panel

-stdout: Send output to stdout, via messages. You only need to use this option if you
have selected another output format, such as a file, and would also like to receive
messages.

Description

Report can be directed to the Tcl console ("-stdout", default), a file ("-file"), the TimeQuest graphical
interface ("-panel_name"), or any combination of the three.

The report_metastability function can be used to estimate the robustness of asynchronous transfers in your
design.

Background

Synchronization register chains should be used when transferring data between unrelated clock domains
to greatly reduce the probability of the captured data signal becoming metastable. A synchronization
register chain is a sequence of registers with the same clock, that is driven by a pin, or logic from an
unrelated clock domain. The output of all but the last register in the chain must connect only to the next
register, either directly or indirectly through logic.

When a register is metastable, its output hovers at a voltage between high and low for a length of time
beyond the normal Tco for the register. The design can fail if subsequent registers that use this metastable
signal latch different values. Therefore, it is important to properly synchronize data signals to prevent
such occurrences.

Output

The report_metastability function generates a list of synchronization register chains found in the design,
and can provide estimates of the Mean Time Between Failures (MTBF) of each chain. The design MTBF is
an estimate of the overall robustness of the design, computed from the MTBF results from all
synchronization chains with calculated MTBFs. The design MTBF metric is reported only when the design
meets timing. Therefore, it is important to fully timing constrain your design.

The typical MTBF result assumes typical silicon characteristics for the selected device speed grade, with
nominal operating conditions.

The worst case MTBF result uses the worst case silicon characteristics for the selected device speed grade,
with worst case operating conditions.

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