Altera SDC and TimeQuest API - Manual (Page 88)

2–78 Chapter 2: SDC and TimeQuest API Package and Commands
sta
SDC and TimeQuest API Reference Manual © December 2009 Altera Corporation
enable_ccpp_removal
Usage
enable_ccpp_removal [-depth <depth>] [-off] [-on]
Options
-depth <depth>: maximum clock tree depth for cppp removal
-off: Disable this setting.
-on: Enable this setting.
Description
Enables (or disables) common clock path pessimism (CCPP) removal during slack computation. CCPP
removal can improve timing results by removing min/max delay differences from common portions of
clock paths. Enabling CCPP removal increases the time required to perform timing analysis.
When specified, the optional depth parameter limits the clock tree depth used for CCPP removal. This is
generally not applicable to FPGA compilations where the clock tree is fixed, but for large HardCopy
designs with potentially deep synthesized clock trees this can reduce outlier run time.
When not specified, or when specified with a value of 0, the complete clock tree is used for CCPP removal
(i.e. full clock-tree depth).
Example
project_open top
create_timing_netlist
read_sdc
# Report timing without CCPP removal
report_timing
# Enable CCPP removal and re-report timing.
enable_ccpp_removal
report_timing
delete_timing_netlist
project_close