Set_max_delay, Set_max_delay –35 – Altera SDC and TimeQuest API User Manual

Page 45

Advertising
background image

Chapter 2: SDC and TimeQuest API Package and Commands

2–35

sdc

© December 2009

Altera Corporation

SDC and TimeQuest API Reference Manual

set_max_delay

Usage

set_max_delay [-fall_from <names>] [-fall_to <names>] [-from <names>] [-rise_from
<names>] [-rise_to <names>] [-through <names>] [-to <names>] <value>

Options

-fall_from <names>: Valid source clocks (string patterns are matched using Tcl string
matching)

-fall_to <names>: Valid destination clocks (string patterns are matched using Tcl
string matching)

-from <names>: Valid sources (string patterns are matched using Tcl string matching)

-rise_from <names>: Valid source clocks (string patterns are matched using Tcl string
matching)

-rise_to <names>: Valid destination clocks (string patterns are matched using Tcl
string matching)

-through <names>: Valid through nodes (string patterns are matched using Tcl string
matching)

-to <names>: Valid destinations (string patterns are matched using Tcl string matching)

<value>: Time Value

Description

Specifies a maximum delay exception for a given path.

The maximum delay is similar to changing the setup relationship (latching clock edge - launching clock
edge), except that it can be applied to input or output ports without input or output delays assigned to
them. Maximum delays are always relative to any clock network delays (if the source or destination is a
register) or any input or output delays (if the source or destination is a port). Therefore, input delays and
clock latencies are added to the data arrival times. Clock latencies also added to data required times and
output delays are subtracted from data required times.

The -from and -to values are collections of clocks, registers, ports, pins, or cells in the design. If the -from
or -to values are not specified, the collection is converted automatically into [get_keepers *]. It is worth
noting that if the counterpart to the unspecified collection is a clock collection, it is more efficient to
explicitly specify this collection as a clock collection but only if the clock collection also generates the
desired assignment.

Applying exceptions between clocks applies the exception from all register or ports driven by the -from
clock to all registers or ports driven by the -to clock. Applying exceptions between a pair of clocks is more
efficient than for specific node to node or node to clock paths.

If pin names or collections are used, the -from value must be a clock pin and the -to value must be any
non-clock input pin to a register. Assignments from clock pins or to and from cells applies to all registers in
the cell or driven by the clock pin.

The -through values are collections of pins or nets in the design. An exception applied through a node in
the design applies only to paths through the specified node.

The -rise_from and -fall_from options can be used in place of the -from destination nodes. The rise or fall
value of the option indicates that the "from" nodes are driven by the rising or falling edge of the clock that
feeds this node taking into consideration any logical inversions along the clock path. The "-from" option is
the combination of both rising and falling "from" nodes. If the "from" collection is a clock collection, the
assignment applies to those nodes that are driven by the respective rising or falling clock edge.

Advertising