Altera Stratix II GX EP2SGX90 Transceiver Signal Integrity Development Board - Manual (Page 24)

2–14 Reference Manual Altera Corporation
Stratix II GX EP2SGX90 Transceiver Signal Integrity Development Board May 2006
Interfaces
USB Interface
The USB interface to the board provides a communication port to a host
PC. A USB physical connection is used to enable laptops without RS232
ports to communicate with the demo board.
To simplify the USB interface, the board contains a FTDI FT2232L USB
universal asynchronous receiver/transmitter (UART) circuit. The UART
eliminates the need for full USB software and hardware implementation.
In addition, the USB UART design allows the software to be designed as
if writing directly to the host PC’s COM port, which eliminates the need
for designing a USB software driver (see
Figure 2–7 ).
Transceiver Block 2,
4 Channels TX_P4 J43 AB4
TX_N4 J45 AB5
RX_P4 J42 AB1
RX_N4 J44 AB2
TX_P3 J39 Y4
TX_N3 J40 Y5
RX_P3 J38 Y1
RX_N3 J41 Y2
TX_P2 J32 N4
TX_N2 J33 N5
RX_P2 J30 N1
RX_N2 J31 N2
TX_P1 J36 R4
TX_N1 J37 R5
RX_P1 J34 R1
RX_N1 J35 R2
Transceiver Block 3,
1 Channel TX_P5 J47 AF4
TX_N5 J48 AF5
RX_P5 J49 AF1
RX_N5 J46 AF2
Table 2–8. Transceiver Block Corresponding Signals, SMA Designator, and
FPGA Pin (Part 2 of 2)
Block Signal
SMA Reference
Designator
Stratix II GX Pin