Segment displays (d9, d10), Segment displays (d9, d10) -19 – Altera Stratix II GX EP2SGX90 Transceiver Signal Integrity Development Board User Manual
Page 29
Altera Corporation
Reference Manual
2–19
May 2006
Stratix II GX EP2SGX90 Transceiver Signal Integrity Development Board
Board Components & Interfaces
Figure 2–11. LED Schematic
7-Segment Displays (D9, D10)
Board references D9 and D10 are dual user-defined, seven-segment
displays. The primary function of the 7-segment displays is to display the
board’s hardware version, which simplifies board revision control.
To save board space, the 7-segment displays are a small form factor. Each
segment is individually controlled by a general purpose I/O pin. When
the EP2SGX90 FPGA pin drives logic 0, the corresponding segment
illuminates. See
.
1
2
R
N
2
220
Ω
R_PACK-4
USER_LED0
USER_LED2
USER_LED3
USER_LED4
USER_LED5
USER_LED6
USER_LED7
USER_LED
8
7
7
3
6
4
5
3
V
3
1
2
R
N
3
R_PACK-4
7
7
3
6
4
5
D1
LED GREE
N
1
2
D2
LED GREE
N
1
2
D3
LED GREE
N
1
2
D4
LED GREE
N
1
2
D5
LED GREE
N
1
2
D6
LED GREE
N
1
2
LED GREE
N
1
2
D
8
D7
LED GREE
N
1
2